Chapter 1 - Introduction to Computer Architecture

1.2 Microcomputer Architecture

• Computer System  -  Consists of Central Processing Unit, Memory, Input/Output and buses.
1. Central Processing Unit  (CPU) - Controls rest of computer system through the execution of program algorithm instructions.
2. Memory - Stores program algorithm instructions and data. Consists of multiple storage locations that can be individually addressed  by the CPU to store or retrieve the value held at that location.
3. Input/Output - Connects CPU to devices (printers, monitors, etc.) in the world outside.
4. Buses - Essentially wires that connect CPU to memory and Input/Output devices.
• Data bus - Carries data between CPU, memory and I/O. Note that data is anything stored or retrieved to or from memory or I/O devices.
• Address bus - Carries the address of the memory location or I/O device the CPU is accessing. In this simple model, only the CPU can generate an address.
• Control bus - Carries control signals such as read or write memory, an interrupt has occurred, clock signals, etc.

Hypothetical Machine (Runnion p. 7)

A hypothetical machine architecture (i.e. one that does not exist in hardware) is given in the text for us to examine a simple computer's operation. The diagram at right is of the CPU with internal registers, memory is at the center of the diagram for storing program instructions and data.

The CPU's function is to execute program instructions stored in memory. How does the CPU execute a high-level language program? Consider the following C++ statement: 

Y = S + T - R

  The Hypothetical Machine or other computer cannot execute a program written in symbolic form such as C++ directly. Each C++ symbolic statement must be  translated to the corresponding machine instructions that can be executed by that CPU, in this case for the Hypothetical Machine.

A C++ compiler can translate the Y = S + T - R into the Hypothetical Machine program code that follows. For the Hypothetical Machine, four machine instructions are translated from the single C++ statement. This is due to C++ having four operands (variables) Y, S, R, and T in one statement but each Hypothetical Machine instruction can have only one operand in memory.

How can the Hypothetical Machine do arithmetic operations with only one operand instructions when most operations require three operations, for example X=Y+Z. The Hypothetical Machine has an accumulator named A that, as in a calculator, is always one of the operands. The following illustrates how Y = S + T - R is implemented in Hypothetical Machine language.
 

Y = S + T - R Translation to Hypothetical Machine Language

Operation	Hypothetical  Machine Mnemonic	Comments
A = S	LDA   S	Load A register with value of S
A = A + T	ADD  T	Add to A register value of T
A = A - R	SUB   R	Subtract from A register value of R
Y = A	STA   Y	Store the A register value to Y

The CPU executes machine instructions that are stored in memory. How does the CPU of the machine work?  Suppose we had written the program instructions to perform Z = Y + 921. The machine instructions of the algorithm and data (variables Z and Y, and constant 921) would be stored in memory.

How would the program, algorithm and data, appear in the Hypothetical Machine memory?  

Z=Y+921 in Memory

01005 20004 02006 30007 00921 04800 00807 99000

Useful to remember that PROGRAM = ALGORITHM + DATA

PROGRAM Z=Y+921 - To better see how the program is represented in memory we need to know addresses of program instructions (ALGORITHM) and variables (DATA) as below. The ALGORITHM is stored in memory addresses 000-003, and 007. The DATA (variables) are stored in memory addresses 004-006.

Address

Instruction

Mnemonic 

Comments 

 
000 
001 
002 
003 
004 
005 
006 
 007 

OP ADDR
       01 005 
      20 004 
      02 006 
      30 007 
      00921 
      04800 
      00807 
      99 000 
       

  
      LDA Y
      ADD 921  
      STA Z
      Jmp 007
 921  00921
 Y    04800
 Z    00807
      HLT

 
 A = Y
 A = A + 921
 Z = A
 GO TO Address 7
 Constant 921
 Variable Y
 Variable Z
 Halt Execution

PC     3 digits, holds address in range 000 to 999 of next instruction.
IR     5 digits, holds instruction (2-digit operation and 3-digit operand).
A, B   5 digits, holds numerical value in range -99999 to 99999.
MAR    3 digits, holds address in range 000 to 999 of Memory index.
MDR    5 digits, holds numerical value accessed to/from Memory[ MAR ].
Memory 5 digits, array indexed from 000 to 999, holds values -99999 to 99999

0.    Initialize CPU				 PC = 0

1.    Fetch instruction at PC                 Memory ADDRESS 001 = 20004
2.    PC = PC + 1                             PC = 2
3.    Decode                                  OP=20 ADDR=004
4.    Execute OP                              A = A + 921 = 5721
5.    GO TO 1.

1.    Fetch instruction at PC                 Memory ADDRESS 002 = 02006
2.    PC = PC + 1                             PC = 3
3.    Decode                                  OP=02 ADDR=006
4.    Execute OP                              Z = A = 5721
5.    GO TO 1.

1.    Fetch instruction at PC                 Memory ADDRESS 003 = 30007
2.    PC = PC + 1                             PC = 4
3.    Decode                                  OP=30 ADDR=007
4.    Execute OP                              PC = 007
5.    GO TO 1.

1.    Fetch instruction at PC                 Memory ADDRESS 007 = 99000
2.    PC = PC + 1                             PC = 8
3.    Decode                                  OP=99 ADDR=000
4.    Execute OP                              HLT