Homework 1
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Modified: |
Example programs and link libraries for Visual Studio 2010
Programs and libraries for previous Visual Studio versions, see:
The text provides an introduction and example of the basic steps required to complete course programming assignments.
Programs and libraries for previous Visual Studio versions, see:
Follow steps 1-5 in section: Running the Sample Program in Debug Mode.
Take a screen shot of Console window.
You should have a cover sheet and 3 screen shots.
We examine a simple, hypothetical (not real) machine to more easily understand machine operation.The Hypothetical Machine has been implemented in Java and can be run in a browser by clicking Hypothetical Machine Simulator.
The hypothetical
machine architecture described in class is simple enough to be implemented in software by a one page C++ program! The software merely simulates the operation of the hypothetical computer CPU which produces the same results as if the hypothetical CPU existed.
Simulating the hypothetical hardware in software is a truly powerful idea since programs can be written for the hypothetical machine but executed by simulation software on a real computer. See the Hypothetical Machine in C++ at the end of this document for the simulator software. Software for new hardware is often implemented in this way while the hardware is still under development.
How does the simulator work? In fact, much like the hardware it simulates, both implement a Fetch/Execute cycle.
Suppose X = 35 and Y = 56, for the following:
Z = X + Y
the corresponding Hypothetical Machine operations are:
LDA Y ; Load A (Accumulator) with value at address of Y
ADD X ; Add value at address of X to A
STA Z ; Store A to address of Z
The complete program, with 35 and 56 in memory for X and Y variables, would be as in Figure 1.
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Figure 1 |
Address Contents Mnemonic Comments 000 01004 LDA Y A = Y 001 20003 ADD X A = A + X 002 02005 STA Z Z = A 003 00035 Variable X 004 00056 Variable Y 005 00000 Variable Z |
NOTE
The MNEMONIC column entries correspond to the INSTRUCTION column, so mnemonic:
ADD X is stored as 20003 (ADD is code 20) at memory ADDRESS 001.
Variable Y address is 004 so that mnemonic LDA Y instruction code is 01004 (LDA is code 01 and Y is at address 004).
To run this program, the simulator executes the fetch/execute cycle for the hypothetical machine. The execution starts by fetching the LDA Y instruction and executing. The simulator program simply implements the hypothetical machine fetch/execute cycle as below:
ALGORITHM:
Simply stated, a hardware CPU runs a program by repeatedly FETCH'ING one instruction from memory and EXECUTE'ING that instruction in an endless cycle. This is called the FETCH/EXECUTE cycle.To simulate the Hypothetical CPU hardware, we must implement this cycle as below.
1. Fetch instruction at PC by: MAR = PC
MDR = Memory[ MAR ]
IR = MDR
2. PC = PC + 1 PC = next instruction address
3. Decode instruction: OP = IR operation field
Addr = IR address field
4. Execute operation OP.
5. Go to 1.
DATA:
Notice that the CPU architecture (internal memory: PC, IR, A, B, MDR, MAR) and external memory are simulated using variables to hold each register's data. We accurately represent the hypothetical CPU internal memory by:
PC 3 digits, holds address in range 000 to 999 of next instruction. IR 5 digits, holds instruction (2-digit operation and 3-digit operand). A, B 5 digits, holds numerical value in range -99999 to 99999. MAR 3 digits, holds address in range 000 to 999 of Memory index. MDR 5 digits, holds numerical value accessed to/from Memory[ MAR ]. Memory 5 digits, array indexed from 000 to 999, holds values -99999 to 99999.
Machine language programs for the hypothetical machine can be executed using a Web-based simulator that executes programs as discussed above.The simulator allows direct modification of memory and CPU registers, step-by-step execution of programs, and observation of internal CPU operations.
We will use the simulator to help understand how a CPU executes machine language programs by observing the step-by-step operations performed by the CPU.
The following program:
Loads the value (00035) from address 002.
Exchanges the contents of the A and B CPU registers.
Not much but enough to observe the execution of a small program.
Address Contents Operation 000
001
002
003LDA 002
XAB
The following listing is a complete example C++ program of a simulator for the Hypothetical Machine of the text. It is given for enrichment only and is not to be turned in. To execute a Hypothetical Machine program using the simulator under DOS or UNIX operating systems use:
01004
20005
02006
30007
00921
04800
00807
99000
// Machine language interpreter for Hypothetical Machine architecture
#include <iomanip.h>
#include <stdlib.h>
typedef long WordSize;
typedef int AddressRange;
typedef int CodeSize;
WordSize Memory[ 1000 ], IR, A, B, MDR; // Machine architecture
AddressRange PC, MAR;
void Interpret() // Interpret program instructions stored in memory
{ WordSize Temp;
CodeSize OP;
AddressRange Addr;
cout << "PC OP Addr A B" << "\n"; A = 0; B = 0;
PC = 0;
while (1) { // Forever
MAR = PC;
MDR = Memory[MAR];
IR = MDR; // Fetch
cout << setw(2) << PC;
PC = PC + 1; // Increment PC
OP = IR / 1000; // Decode
Addr = IR % 1000;
cout << setw(4) << OP << setw(6) << Addr << setw(7) << A
<< setw(7) << B << "\n";
switch (OP) { // Execute OP
case 01 : MAR = Addr; // LDA Addr
MDR = Memory[ MAR ];
A = MDR;
break;
case 02 : MAR = Addr; // STA Addr
MDR = A;
Memory[ MAR ] = MDR;
break;
case 03 : {
Temp = A; // XAB
A = B;
B = Temp;
break;
}
case 04 : A = 0; // CLA
break;
case 20 : MAR = Addr; // ADD Addr
MDR = Memory[ MAR ];
A = A + MDR;
break;
case 21 : MAR = Addr; // SUB Addr
MDR = Memory[ MAR ];
A = A - MDR;
break;
case 30 : PC = Addr; // JMP
break;
case 99 : exit(0); // HLT
}
}
}
void Load() // Load instructions into memory from file
{ char Line[80];
PC = 0;
cin >> dec >> IR; cin.getline(Line, 80, '\n');
while (cin) {
Memory[ PC ] = IR;
PC = PC + 1;
cin >> dec >> IR; cin.getline(Line, 80, '\n');
}
}
void main()
{ Load();
Interpret();
}