Chapter 6 Notes

1. Two Input Multiplexer - A mux selects output from two or more inputs. It acts as a selection switch, much as the TV channel changer can select from several channels as input to output to the single screen. The switching function table for a two input multiplexer that uses a selector s to select between two inputs, x₁ and x₀ is:

s x1 x0 | z     s | z                 x1x0
0 0  0 | 0     0 | x0              s \00 01 11 10
0 0  1 | 1     1 | x1               0| 0| 1| 1| 0|           
0 1  0 | 0                          1| 0| 0| 1| 1|
0 1  1 | 1
1 0  0 | 0                           z = x1s + x0s'
1 0  1 | 0
1 1  0 | 1
1 1  1 | 1

The gate network to implement a two input mux and symbol is:
 
2. Universal Set - Multiplexers constitute a universal set and are sometimes used, as in some FPGA's, as the basis of all logic operations. The following implement the NOT, AND, OR operations using a two input Multiplexer.

 

NOT  z  = 0x1+ 1x1' = x1'
AND  z = x1x0+ 0x0' = x1x0
OR  z = 1x0+ x1x0' = x1+x0

3. Programmable - The multiplexer is in a sense programmable since other logic operations can be produced by choosing different inputs. Consider the useful expression x₂x₀+x₃x₀^'  implemented by: 
4. Shannon's Decomposition - f(x_n-1,x_n-1,...,x₀) = f(x_n-1,x_n-1,...,1) x₀+ f(x_n-1,x_n-1,...,0)x₀'


From the text example,
                       z = x₃(x₁+x₂x₀) = x₃x₁+x₃x₂x₀
                        f(x₃,x₂,x₁,0) = x₃x₁x₀^'+x₃x₂0 =  x₃x₁1 + 0 = x₃x₁x₀^'
                        f(x₃,x₂,x₁,1) = x₃x₁x₀+x₃x₂x₀  = x₃x₁1+x₃x₂1 =   x₃x₁x₀+ x₃x₂x₀
 so                   z = x₃x₁x₀' +  x₃x₁x₀+ x₃x₂x₀ = x₃x₁x₀' +  x₃(x₁+x₂)x₀

This was implemented by:


5.  Building Blocks for Digital Design - Larger multiplexers can be constructed from smaller ones by casading. In the following figure, two input multiplexers are used to construct a four input multiplexer. The two selectors, s₁s₀, when 2 (s₁=1 and s₀=0) selects x₂ or the 10₂ position.


The algebraic expression for a four-input multiplexer is: z = x₃s₁s₀+ x₂s₁s₀'+x₁s₁'s₀+x₀s₁'s₀' which would have 6 inputs and 64 rows for a truth table solution. The functional behavior for the 4-input multiplexer and modular implementation would be:

s1 s0 | Output  0   0 |  x0  0   1 |  x1  1   0 |  x2  1   1 |  x3