# Chapter 6 Notes

6.4 Networks with Two Input Multiplexers
1. Two Input Multiplexer - A mux selects output from two or more inputs. It acts as a selection switch, much as the TV channel changer can select from several channels as input to output to the single screen. The switching function table for a two input multiplexer that uses a selector s to select between two inputs, x1 and x0 is:
2. ```s x1 x0 | z     s | z                 x1x0
0 0  0 | 0     0 | x0              s \00 01 11 10
0 0  1 | 1     1 | x1               0| 0| 1| 1| 0|
0 1  0 | 0                          1| 0| 0| 1| 1|
0 1  1 | 1
1 0  0 | 0                           z = x1s + x0s'
1 0  1 | 0
1 1  0 | 1
1 1  1 | 1```
The gate network to implement a two input mux and symbol is:

3. Universal Set - Multiplexers constitute a universal set and are sometimes used, as in some FPGA's, as the basis of all logic operations. The following implement the NOT, AND, OR operations using a two input Multiplexer.

4.
 NOT  z  = 0x1+ 1x1' = x1' AND  z = x1x0+ 0x0' = x1x0 OR  z = 1x0+ x1x0' = x1+x0
5. Programmable - The multiplexer is in a sense programmable since other logic operations can be produced by choosing different inputs. Consider the useful expression x2x0+x3x0'  implemented by:
6. Shannon's Decomposition - f(xn-1,xn-1,...,x0) = f(xn-1,xn-1,...,1) x0+ f(xn-1,xn-1,...,0)x0'

7. From the text example,
z = x3(x1+x2x0) = x3x1+x3x2x0
f(x3,x2,x1,0) = x3x1x0'+x3x20 =  x3x11 + 0 = x3x1x0'
f(x3,x2,x1,1) = x3x1x0+x3x2x0  = x3x11+x3x21 =   x3x1x0+ x3x2x0
so                   z = x3x1x0' +  x3x1x0+ x3x2x0 = x3x1x0' +  x3(x1+x2)x0

This was implemented by:

8.  Building Blocks for Digital Design - Larger multiplexers can be constructed from smaller ones by casading. In the following figure, two input multiplexers are used to construct a four input multiplexer. The two selectors, s1s0, when 2 (s1=1 and s0=0) selects x2 or the 102 position.
9. The algebraic expression for a four-input multiplexer is: z = x3s1s0+ x2s1s0'+x1s1's0+x0s1's0' which would have 6 inputs and 64 rows for a truth table solution. The functional behavior for the 4-input multiplexer and modular implementation would be:

 s1 s0 | Output  0   0 |  x0  0   1 |  x1  1   0 |  x2  1   1 |  x3